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发信人: hitter (请稍后...涅磐中), 信区: METech
标 题: EEtime记者vs intel on MEMS
发信站: 哈工大紫丁香 (2004年01月12日08:08:46 星期一), 站内信件
http://www.siliconstrategies.com/story/OEG20020911S0052
Q&A: Bob Rao of Intel
By Peter Clarke
EE Times
(09/11/02 02:40 p.m. EST)
Valluri "Bob" Rao has been with Intel since 1983. He has progressed to beco
me an Intel Fellow and the director of an analytical and microsystems techno
logies at Intel's technology and manufacturing group. He is responsible for
directing the development of advanced analytical tools and methods for micro
processor performance characterization, silicon debug and yield enhancement.
Rao also directs Intel's microsystems and MEMS research and development act
ivities.
EET: Why is Intel interested in MEMS?
Rao: Because MEMS is basically a silicon technology. It uses back-end proces
s steps. It is CMOS-like with a few additional steps. MEMS plays to our stre
ngths as a silicon manufacturer.
EET: Although not all MEMS require silicon?
Rao: Well, that depends on your definition. I think of micromechanical syste
ms built in silicon. Some of the biological applications I don't necessarily
view as MEMS. I am interested in micromachines in silicon.
EET: Why after 40 years has there been a seemingly sudden explosion of appli
cations for MEMS?
Rao: Well, at the core is the technology; the process, the packaging, the de
sign. But what you do is governed by the application. Always the question is
, "How can I do something better?" or, rather, "How can I make money by doin
g something better?" So with MEMS we've had a lot of technological progress
but the applications have been slow in coming, there were few of those thing
s that needed to be done better.
You need to find miniaturized versions of macroscopic applications. The airb
ag [MEMS accelerometer] was one.
The big advantage that microelectronics has enjoyed has been the existence o
f a universal building block, the transistor. It is replicable across a die
by the millions. In MEMS there has been no such universal building block; ev
ery application has a different building block. It is the same with packagin
g, which quickly became very standard in microelectronics but you require di
fferent packages for every application in MEMS.
The trending of MEMS is not as clean as VLSI and so MEMS have been successfu
l only in niche areas.
Optical MEMS have been pursued because optical networking emerged as a major
force in the last 10 years. It became clear that MEMS could have a role avo
iding optical-electronic-optical conversions. Optical was a compelling appli
cation that spawned a big area of development.
Similarly, the 1990s saw an explosion in a lot of biological applications su
ch as genome-mapping.
But for all that I don't think there has been a thresholding effect yet in t
erms of markets reaching critical mass or third-party design tools. The volu
me markets for MEMS haven't happened yet.
Right now we've got applications but low volumes. Manufacturing becomes a lo
t more seamless when you have volume.
EET: What about the scalability of MEMS compared with microelectronics?
Rao: The scalability is different. Halving the size of a mechanical structur
e does not make it better; it will probably make it worse. Generally in MEMS
the lateral lithography is very loose, say at 1 micron. But the vertical li
thography can be very tight, thin films, thin gaps. That is where the scalin
g is coming. You can reduce voltages by bringing things closer together.
EET: So are there advantages from integrating MEMS and electronics?
Rao: MEMS do have a scalability but it is akin to the scalability of analog
and mixed-signal electronics. Therefore, putting MEMS components on a digita
l chip doesn't necessarily make sense. It's not cost-effective to put the tw
o together unless there is a compelling reason. The area you take up with a
MEMS device is an issue. It may be less costly to build MEMS in an older pro
cess technology and integrate within a package.
EET: What are the barriers to deployment?
Rao: As I said, finding end applications that can really benefit. And then t
he thing that is lagging is manufacturing experience.
EET: Intel could have made use of microfluidic cooling for its processors?
Rao: The need hasn't arisen yet. It's definitely very interesting to us but
at the same time it raises issues of reliability. Applications drive what yo
u do, but getting the manufacturing reliable in high volume needs to happen
at an appropriate cost.
EET: Which route will MEMS follow? Foundry-plus-fabless or self-contained sp
ecialization?
There are already fabless MEMS companies. There are MEMS foundries. This wil
l continue. As the demand for MEMS emerges it will drive the creation of fab
s.
EET: but there few standard processes and third-party design tools.
Rao: In general, MEMS is in an immature state right now. The number of varia
bles in a design is much greater than VLSI. Every time you do a design you a
re facing a finite element analysis simulation. In a way MEMS is the merging
of mechanical design and VLSI design. One thing that has changed is that yo
u can do this finite element analysis on a relatively simple personal comput
er these days but still....
The thing about MEMS chips is that although the integration is low the testi
ng is like analog circuit testing.
EET: There seems to be as many processes as there are applications. Does div
ersity mean fragmentation?
Rao: The number of process technologies is not that large--if you restrict y
ourself to silicon. The release step, the etching away of any sacrificial la
yers to free up structures, that's the key step.
EET: Yes, but do you have structures in metal, in polysilicon, do you have m
ultiple layers of polysilicon? A lot of MEMS processes seem to have been wri
tten around a particular application, which is not the way in microelectroni
cs.
Rao: That's true, but if you modularize the process steps: a deep-etch modul
e, a bulk-etch module, a surface-etch module. If you modularize like that th
en it's not too bad. I can imagine a single fab with all these things availa
ble. The difficulty is the integration of the modules.
Release deep-etch, thick metal deposition, double-sided wafer alignment, waf
er bonding. I don't think it is anarchy out there.
EET: What are the opportunities for cross-over among plastics, glass and sil
icon substrates and structures?
Rao: There is some closeness between glass and silicon but perhaps not betwe
en silicon and plastic. So packaging will be the key. But new materials are
coming into silicon technology.
EET: What are the most promising areas of MEMS research?
Rao: We are keeping an eye on sensor networks through a "Lablet" at Universi
ty of California Berkeley under David Culler.
Also the storage area is very interesting. RF work we are pursuing internall
y. Then there's fuel cells, which can fall into the MEMS area.
Also, optical networking has matured greatly. I think optics and MEMS play t
ogether well because optics relies on the precision motion that MEMS can giv
e.
EET: What is the earliest date that you think Intel could be deploying MEMS
technology?
Rao: That's difficult. For us MEMS is an early-stage research project.
EET: Within five years?
Rao: Maybe. It's too early to say.
EET: Thank you for your time.
--
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