Paper 版 (精华区)
发信人: wangcq (bigdog), 信区: Paper
标 题: CALL FOR ABSTRACTS
发信站: BBS 哈工大紫丁香站 (Mon Apr 18 07:47:23 2005)
First International Workshop on 3S (SOP-SIP-SOC) Electronic Technologies
September 22 & 23, 2005 -
Global Learning & Conference Center at Technology Square
84 Fifth Street, Atlanta, GA, 30308 USA
Sponsored by Georgia Tech Packaging Research Center & IEEE-CPMT Society
General Chair: Rao R. Tummala, PRC Director, Technical Chair: Erich Klink, IBM
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CALL FOR ABSTRACTS | http://www.prc.gatech.edu/3s/3S-call.pdf
Due June 15th. Send 300-word abstracts to boyd.wiedenman@ece.gatech.edu
Course Fees & Program Updates | http://www.prc.gatech.edu/3s
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This workshop reviews the latest R & D and manufacturing status of each of
these 3 “hottest” electronic technologies around the world. It will also att
empt
to compare and contrast SOC, 3D stacking, SIP, SOP and MCM.
KEYNOTE SPEAKERS
- System-In-Package (SIP) - *Ken Brown, Mgr. Non-CPU Packaging (Intel)
- System-On-Chip (SOC) - Mahesh Mehendale, TI Fellow, Texas Instruments
- Wafer Level SIP - Pieter Hooijmans, V.P. & RF Program Mgr., Philips
- SOCs with 3D Interconnects - H. Bernhard Pogge, IBM Fellow, IBM
- System-On-Package (SOP) - Rao Tummala, Director, GT-PRC
TOPICS / PRESENTERS
- Mixed Signal Design & Tools - Madhavan Swaminathan, GT-PRC
- Embedded Optical & Digital Integration & Modules - G.K. Chang, GT-PRC
- Embedded RF Integration & Modules - Manos Tentzeris, GT-PRC
- SOP Fabrication - Venkatesh Sundaram, GT-PRC
- Wafer Level Assembly - C. P. Wong, GT-PRC
- Mixed Signal Test - Abhijit Chatterjee, GT-PRC
- Mixed Signal Reliability - Suresh Sitaraman, GT-PRC
- SIP - George Connor, Philips
PANEL DISCUSSION
- SOC vs. SIP vs. SOP - TBD
*Tentative
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